1. Field of the invention
The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device implementing in-plane switching (IPS) where an electric field to be applied to liquid crystal is generated in a plane parallel to a substrate.
2. Description of Related Art
Recently, light and thin liquid crystal display (LCD) devices with low power consumption are used in office automation equipment, video devices, and the like. Such LCDs typically use an optical anisotropy and spontaneous polarization of a liquid crystal (LC). The liquid crystal has thin and long liquid crystal molecules, which cause a directional alignment of the liquid crystal molecules. At this point, an alignment direction of the liquid crystal molecules is controlled by applying an electric field to the liquid crystal molecules. When the alignment direction of the liquid crystal molecules are properly adjusted, light is refracted along the alignment direction of the liquid crystal molecules to display image data. Of particular interest is an active matrix (AM) LCD, in which a plurality of thin film transistors and pixel electrodes are arranged in matrix array, because of its high resolution and superiority in displaying moving pictures. Driving methods for such LCDs typically include a twisted nematic (TN) mode and a super twisted nematic (STN) mode. A TN liquid crystal panel has high transmittance and aperture ratio. In addition, since the common electrode on the upper substrate serves as a ground, static electricity is prevented from destroying the liquid crystal panel.
Although TN LCDs and STN LCDs, which have the same structure, have been put to practical use, they have a drawback in that they have a very narrow viewing angle. In order to avoid the problem of narrow viewing angle, IPS LCD devices have been proposed. IPS LCD devices typically include a lower substrate where a pixel electrode and a common electrode are disposed, an upper substrate having no electrode, and a liquid crystal interposed between the upper and lower substrates. The IPS LCD device has advantages in contrast ratio, gray inversion, and color shift that are related to the viewing angle.
FIG. 1A is a detailed plan view showing a unit pixel region 10 of a typical IPS-LCD device. In addition, a cross-sectional view taken along a line xe2x80x9cBxe2x80x94Bxe2x80x9d in FIG. 1A is illustrated in FIG. 1B.
On the surface of a transparent substrate la adjacent to the liquid crystal layer, a scan signal line 2 made of, for example, aluminum (Al) is formed extending along the x-direction, as shown in FIG. 1A. In addition, a reference signal line 4, also known as a common line, is formed extending along the x-direction, close to the scan signal line 2 on the +y-direction side thereof. The reference signal line 4 is also made of, for example, Al. A region surrounded by the scan signal line 2, the reference signal line 4, and video signal lines 3 constitutes the unit pixel region 10.
In addition, the unit pixel region 10 includes a reference electrode 14 formed by the reference signal line 4, and another reference electrode 14 formed adjacent to the scan signal line 2. The pair of horizontally extending reference electrodes 14 are positioned adjacent to one of a pair of video signal lines 3 (on the right side of FIG. 1A), and are electrically connected to each other through a conductive layer 14a, which is formed simultaneously with the reference electrodes 14.
In the structure described above, the reference electrodes 14 form a pair extending in the direction parallel to the scan signal line 2. In other words, the reference electrodes 14 form a strip extending in a direction perpendicular to the video signal lines 3.
As shown in FIGS. 1A and 1B, a first insulating layer 11 made of, for example, silicon nitride is formed on the surface of the lower substrate la on which the scan signal lines 2 are formed, thereby overlying the scan signal line 2, the reference signal lines 4, and the reference electrodes 14. The first insulating layer 11 functions as (a) an inter-layer insulating film for insulating the scan signal line 2 and the reference signal line 4 from the video signal lines 3, (b) as a gate-insulating layer for a region in which a thin film transistor (TFT) is formed, and (c) as a dielectric film for a region in which a capacitor xe2x80x9cCstgxe2x80x9d is formed. The TFT includes a drain electrode 3a and a source electrode 15a. A semiconductor layer 12 for the TFT is formed near a crossing point of the gate and data lines (scan signal lines and video signal lines) 2 and 3. A first polarization layer 18 is formed on the other surface of the lower substrate 1a. 
On the first insulating layer 11, a display electrode 15 is formed parallel with the reference electrode 14. One end portion of the display electrode 15 is electrically connected to the conductive layer 14a, and the other end portion thereof is electrically connected to the source electrode 15a. Still on the first insulating layer 11, a first planar layer 16 is formed to cover the display electrode 15. A first alignment layer 17 is formed on the first planar layer 16.
Under an upper substrate 1b, a black matrix 30 is disposed. A color filter 25 is formed to close an opening in the black matrix 30. A second planar layer 27 is placed to cover the color filter 25 and the black matrix 30. A second alignment layer 28 is placed under the surface of the second planar layer 27 facing the liquid crystal layer LC.
The color filter 25 is formed to define three unit pixel regions adjacent to and extending along the video signal line 3 and to position a red (R) filter, a green (G) filter, and a blue (B) filter, for example, from the top of the three unit pixel regions. The three unit pixel regions constitute one pixel region for color display.
A second polarization layer 29 is also arranged on the surface of the upper substrate 1b that is opposite to the surface of the upper substrate 1b adjacent to the liquid crystal layer LC, on which various layers are formed as described above.
It will be understood that in FIG. 1B, a voltage applied between the reference electrodes 14 and the display electrode 15 causes an electric field xe2x80x9cExe2x80x9d to be generated in the liquid crystal layer LC in parallel with the respective surfaces of the lower and upper substrates 1a and 1b. This is why the illustrated structure is referred to as the in-plane switching LCD device, as mentioned above.
With reference to FIGS. 2, 3A, and 3B, operation modes of a typical IPS LCD device are explained in detail.
FIG. 2 is a conceptual cross-sectional view illustrating the operation of the typical IPS LCD device. As shown, first and second substrates 1a and 1b are spaced apart from each other, and a liquid crystal LC is interposed therebetween. The first and second substrates 1a and 1b are called an array substrate and a color filter substrate, respectively. On the first substrate 1a, pixel and common electrodes 15 and 14 are disposed. The pixel and common electrodes 15 and 14 are parallel with and spaced apart from each other. On a surface of the second substrate 1b, a color filter 25 is disposed opposing the first substrate 1a. The pixel and common electrodes 15 and 14 apply an electric field xe2x80x9cExe2x80x9d to the liquid crystal molecules LCM. The liquid crystal molecules LCM have a negative dielectric anisotropy, and thus are aligned parallel to the electric field xe2x80x9cExe2x80x9d. The pixel electrode 15 and common electrode 14 are the display electrode 15 and reference electrode 14 of FIG. 1B, respectively.
FIGS. 3A and 3B illustrate operation modes for the typical IPS-LCD device shown in FIG. 2. During the off-state, the long axes of the liquid crystal molecules LCM maintain some angle with respect to an invisible line that is perpendicular to the pixel and common electrodes 15 and 14. The angle is 45 degrees, for example. At this point, the pixel and common electrode 15 and 14 are parallel with each other.
During the on-state, an in-plane electric field xe2x80x9cExe2x80x9d, which is parallel to the surface of the first substrate 1a, is generated between the pixel and common electrodes 15 and 14. The reason is that the pixel electrode 15 and common electrode 14 are formed together on the first substrate 1a. Then, the liquid crystal molecules LCM are twisted such that the long axes thereof coincide with the electric field direction. Thereby, the liquid crystal molecules LCM are aligned such that the long axes thereof are perpendicular to the pixel and common electrodes 15 and 14. The liquid crystal used in the above-mentioned IPS LCD device includes a negative dielectric anisotropy.
Referring now to FIGS. 4, 5A, and 5B, problems of a conventional IPS LCD device are explained.
FIG. 4 shows a lower substrate of the IPS LCD device according to a related art. A gate line 21 and a common line 51 are arranged parallel to each other, and a data line 31 is arranged perpendicular to the gate and common lines 21 and 51. At a crossing portion of the gate and data lines 21 and 31, a gate electrode 22 and a source electrode 32 are disposed. The gate and source electrodes 22 and 32 are integrally connected with the gate line 21 and the data line 31, respectively. The source electrode 32 overlaps a portion of the gate electrode 22. In addition, a drain electrode 33 is disposed opposite to the source electrode 32 with an interval therebetween, and an active layer 41 made of an amorphous silicon is disposed under the source and drain electrodes 32 and 33.
A plurality of common electrodes 53 are disposed perpendicular to the common line 51 and connected thereto at a first common crossing portion 54. The plurality of common electrode 53 are spaced apart from each other with a predetermined interval therebeetween and further connected with a common connecting line 52 at a second common crossing portion 55. The common connecting line 52 is disposed opposing to the common line 51.
A plurality of pixel electrodes 63 are disposed perpendicular to a first pixel connecting line 61 and a second pixel connecting line 62 and connected thereto at a first pixel crossing portion 64 and at a second pixel crossing portion 65, respectively. The first and second pixel connecting lines 61 and 62 are preferably disposed over the common line 51 and the common connecting line 52, respectively. Specifically, the second pixel connecting line 62 is electrically connected with the drain electrode 33 of the TFT labelled xe2x80x9cTxe2x80x9d. The plurality of common electrodes 53 and the pixel electrodes 63 are spaced apart from each other with a predetermined interval therebetween and arranged in an alternating pattern. Therefore, each common electrode 53 is parallel to an adjacent pixel electrode 63.
For the above-described conventional IPS LCD device, the first and second alignment layers 17 and 28 (in FIG. 1B) are used to control a first alignment state of the liquid crystal layer LC (in FIG. 1B). The alignment layers were already rubbed in a definite rubbing direction that corresponds to a desired first alignment state of the liquid crystal layer. Therefore, when the liquid crystal layer is injected into the IPS LCD device, it is aligned in accordance with the rubbing direction of the alignment layers such that the first alignment state thereof is achieved.
When an electric field xe2x80x9cExe2x80x9d (in FIG. 1B) is generated between the common electrode 53 and the pixel electrode 63, molecules of the liquid crystal layer are aligned in accordance with the electric field direction, which forms certain angles with the rubbing direction. The electric field should be uniform throughout an interval between the common electrode 53 and the adjacent pixel electrode 63 to achieve a high display quality. However, in the conventional IPS LCD device shown in FIG. 4, the electric field is usually distorted at the common connecting portions 54, 55 and at the pixel connecting portions 64, 65, thereby causing a disclination. A detailed explanation will be provided with reference to FIGS. 5A and 5B.
In FIG. 5A, before electrical signals are applied to the common electrode 53 and the pixel electrode 63, liquid crystal molecules 80 (in FIG. 5B) are aligned according to a rubbing direction xe2x80x9cRxe2x80x9d of the alignment layers. The rubbing direction xe2x80x9cRxe2x80x9d is preferably at an angle of 10 to 20 degrees with respect to the pixel electrode 63.
When electrical signals are applied, a uniform electric field 71 is generated between the common electrode 53 and the pixel electrode 63, and distorted electric fields 72 and 73 are generated at the first common and pixel connecting portions 54 and 64. The uniform electric field 71 is uniformly perpendicular to the common and pixel electrodes 53 and 63. However, the distorted electric fields 72 and 73 are rounded and appear opposite to corners where the common electrode 53 and the pixel electrode 63 communicate with the common line 51 and the pixel connecting line 61, respectively. At this point, the distorted electric field 72 in a first sub-pixel region 91 and the other distorted electric field 73 in a second sub-pixel region 92 are symmetrical with respect to the pixel electrode 63 centered between the first and second regions 91 and 92.
As shown in FIG. 5B, the liquid crystal molecules 80 rotate in accordance with not only the uniform electric field 71 (in FIG. 5A) but also with the distorted electric fields 72 and 73 (in FIG. 5A). In the first sub-pixel region 91, all of the liquid crystal molecules 80 rotate in a counterclockwise direction, regardless of the difference between the uniform electric field 71 (in FIG. 5A) and the distorted electric field 72 (in FIG. 5A). In the second sub-pixel region 92, however, a portion 80a of the liquid crystal molecules 80 rotates in a clockwise direction in accordance with the other distorted electric field 73 (in FIG. 5A), thereby causing an abnormal alignment at these corner portions. The abnormal alignment of the portion 80a results in the disclination, thereby deteriorating the display qualities including brightness and viewing angle of the IPS LCD device.
To overcome the problems described above and other problems, an embodiment of the present invention provides an IPS LCD device, which has improved display qualities. The present invention, in part, provides an array substrate for an IPS LCD device, the array substrate including: a gate line and a data line on a substrate, the gate and data lines perpendicularly crossing with each so as to define a pixel region; a thin film transistor electrically connected with the gate line and the data line; a plurality of common electrodes disposed on the pixel region, each common electrode being parallel to the data line; a common line connecting with the plurality of common electrodes, the common line being parallel to the gate line; a plurality of pixel electrodes on the pixel region, the plurality of pixel electrodes and common electrodes being arranged in an alternating order with a predetermined interval between the adjacent common and pixel electrodes; and a first pixel connecting line connecting with the plurality of pixel electrodes and overlapping the common line, wherein a corner portion where the pixel electrode meets the first pixel connecting line is slanted with respect to the corresponding pixel electrode. The corner portion is preferably slanted to have an angle of greater than 90 and less than 180 degrees with respect to the corresponding pixel electrode.
In accordance with an aspect of the present invention, there is provided an array substrate device for use in an IPS LCD device, comprising: a gate line disposed in a transverse direction on a substrate; a data line disposed in a longitudinal direction perpendicularly crossing the gate line, the data line defining a pixel region with the gate line; a common line disposed in a transverse direction adjacent to the gate line on the substrate; a thin film transistor adjacent to a crossing portion of the gate and data lines, the thin film transistor including a gate electrode, a semiconductor layer, a source electrode and a drain electrode; a plurality of common electrodes in the pixel region on the substrate, one ends of the plurality of common electrodes coupled with the common line; a gate insulation layer covering the gate line, the gate electrode, the common line and the plurality of common electrodes; a passivation layer covering the data line, the source electrode and the drain electrode, the passivation layer having a drain contact hole exposing the drain electrode; a plurality of pixel electrodes in the pixel region on the substrate, wherein the plurality of pixel electrodes and common electrodes are arranged in an alternating manner and a pair of pixel and common electrodes define a sub-pixel region with a predetermined interval therebetween; a first pixel connecting line disposed on the passivation layer over the common line and coupled with one ends of the plurality of pixel electrodes; first slanted slopes at corners where the common electrodes meet the common line in upper portions of one of the even- and odd-numbered sub-pixel regions; and second slanted slopes at corners where the pixel electrodes meet the first pixel connecting line in the upper portions of one of the even- and odd-numbered sub-pixel regions; wherein each of the first slanted slopes and each of the second slanted slopes cross each other.
In accordance with another aspect of the present invention, there is provided an array substrate device for use in an IPS LCD device, comprising: a common line disposed in a transverse direction adjacent to a gate line on a substrate; a plurality of common electrodes in a pixel region on the substrate, one ends of the plurality of common electrodes coupled with the common line; a plurality of pixel electrodes in the pixel region on the substrate, wherein the plurality of pixel electrodes and common electrodes are arranged in an alternating manner and a pair of pixel and common electrodes define a sub-pixel region with a predetermined interval therebetween; a first pixel connecting line disposed over the common line and coupled with one ends of the plurality of pixel electrodes; first slanted slopes at corners where the common electrodes meet the common line in upper portions of one of the even- and odd-numbered sub-pixel regions; and second slanted slopes at corners where the pixel electrodes meet the first pixel connecting line in the upper portions of one of the even- and odd-numbered sub-pixel regions; wherein each of the first slanted slopes and each of the second slanted slopes cross each other.
These and other objects of the present application will become more readily apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.